The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems

نویسندگان

  • Fernando Herrera
  • Héctor Posadas
  • Pablo Peñil
  • Eugenio Villar
  • Francisco Ferrero
  • Raúl Valencia
  • Gianluca Palermo
چکیده

The design of embedded systems is being challenged by their growing complexity and tight performance requirements. This paper presents the COMPLEX UML/MARTE Design Space Exploration methodology, an approach based on a novel combination of Model Driven Engineering (MDE), Electronic System Level (ESL) and design exploration technologies. The proposed framework enables capturing the set of possible design solutions, that is, the design space, in an abstract, standard and graphical way by relying on UML and the standard MARTE profile. From that UML/MARTE based model, the automated generation framework proposed produces an executable, configurable and fast performance model which includes functional code of the application components. This generated model integrates an XML-based interface for communication with the tool which steers the exploration. This way, the DSE loop iterations are efficiently performed, without user intervention, avoiding slow manual editions, or regeneration of the performance model. The novel DSE suited modelling features of the methodology are shown in detail. The paper also presents the performance model generation framework, including the enhancements with regard the previous simulation and estimation technology, and the exploration technology. The paper uses an EFR vocoder system example for showing the methodology and for demonstrative results. 2013 Elsevier B.V. All rights reserved.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Modeling On-Board Software Dynamic Architecture: A Related Experience using UML-MARTE

MARTE (Modeling and Analysis of Real-Time and Embedded Systems) is the UML extension profile dedicated to the modeling of Real-time and Embedded Systems (RTES). Standardized by the OMG, UML-MARTE is well accepted in the Model Based Driven Engineering community. However there still exists a big gap to bridge for its use in operational space projects. Some of the identified limiting factors are (...

متن کامل

Modeling Networks-on-Chip at System Level with the MARTE UML profile

The study of Networks on Chips (NoCs) is a research field that primarily addresses the global communication in Systems-on-Chip (SoCs). The selected topology and the routing algorithm play a prime role in the performance of NoC architectures. In order to handle the design complexity and meet the tight time-to-market constraints, it is important to automate most of these NoC design phases. The ex...

متن کامل

System level modeling methodology of NoC design from UML-MARTE to VHDL

The evolution of the semiconductor technology caters for the increase in the System-on-Chip (SoC) complexity. In particular, this complexity appears in the communication infrastructures like the Network-on-Chips (NoCs). However many complex SoCs are becoming increasingly hard to manage. In fact, the design space, which represents all the concepts that need to be explored during the SoC design, ...

متن کامل

Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications

The efficient design of computation intensive multidimensional signal processing application requires to deal with three kinds of constraints: those implied by the data dependencies, the non functional requirements (real-time, power consumption) and resources availability of the execution platform. We propose here a strategy to use a refactoring tool dedicated to this kind of applications to he...

متن کامل

Executable SystemC specification of the MARTE generic concurrent and communication resources under different Models of Computation

Modeling and analysis of real-time, embedded systems is becoming an important area of research nowadays. In this context, the UML MARTE profile has been proposed to support the specification, design, and verification stages in the design process. It provides a wide set of facilities to introduce all the information required in the first steps of the design process. To carry out the actions invo...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:
  • Journal of Systems Architecture - Embedded Systems Design

دوره 60  شماره 

صفحات  -

تاریخ انتشار 2014